- PhD and MASc opening: There is no opening for Fall 2025.
Dr. Fang is actively looking for PhD and Master students to join his HiAccel lab. Please find more details in the recruiting page. For SFU students who are interested in joining HiAccel lab, the best way is to take the ENSC 453/894 course in Fall on "Programming for Heterogeneous Computing System" and stand out (A+) in the class. Here is a nice, high-level introduction to FPGAs, one of the key components of our research: Architecture All Access: Modern FPGA Architecture. This talk is given by Intel, but most of the contents apply to both Intel and AMD/Xilinx FPGAs.
- Reference letter request: I only provide recommendation letters for undergraduate or graduate students whom I know well, i.e., (1) with whom I have worked in research, or (2) who have received an A+ in my courses and had significant face-to-face interaction with me.
- Paper submission: Dr. Fang will serve as the General Chair for ASAP 2025 and Program Chair for RAW 2025. More information will come and welcome to submit.
- Oct 2024, one paper accepted by FPT 2024. This paper is on "FLUD: A Scalable and Configurable Systolic Array Design for LU Decomposition on FPGAs", congrats to Xingyu!
- Sept 2024, our SERI paper has won the FPL 2024 Stamatis Vassiliadis Best Paper Award. Congrats to Philip!
- Aug 2024, one paper accepted by TIP 2024. The paper is on "Fast and High-Performance Learned Image Compression With Improved Checkerboard Context Model, Deformable Residual Module, and Knowledge Distillation", congrats to Haisheng!
- Jul 2024, Dr. Fang is invited to serve on the FPGA 2025 TPC, welcome to submit!
- Jul 2024, Dr. Fang is invited to serve on the FPT 2024 TPC, welcome to submit!
- Jul 2024, one paper accepted by ECCV 2024. The paper is on "WeConvene: Learned Image Compression with Wavelet-Domain Convolution and Entropy Model", congrats to Haisheng!
- Jun 2024, one paper accepted by TRETS. The paper is on "PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs", congrats to Moazin, Xingyu, Ahmad, and Akhil! This is a work in collaboration with Prof. Jason Cong's group at UCLA and led by SFU.
- Jun 2024, one paper accepted by TRETS. The paper is on "SQL2FPGA: Automated Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms", congrats to Alec's (my first PhD graduate) 17th paper!
- Jun 2024, five full papers accepted by FPL 2024. The first paper SERI is our first attempt to accelerate quantum chemistry on FPGAs, which got the highest review scores among all FPL 2024 submissions. It is led by my MASc student Philip Stachura, in collaboration with Dr. Xin Wu and Prof. Christian Plessl from Paderborn University. The next two papers FORC and BitBlender accelerate common big data processing tax, Apache ORC file decoder and Bloom filter, on FPGAs. They are led by MASc students Abdul Wadood and Kenny Liu, respectively. The final two papers SDA and SA4 accelerate deep learning workloads, stable diffusion and 4-bit (convolutional) systolic array, on FPGAs. Both papers are led by my visiting PhD student Geng Yang (remotely due to visa issues) from Xidian University. The SDA paper is done in collaboration with Prof. Yanzhi Wang and Prof. Xue Lin from Northeastern University, and Prof. Jie Lei from Xidian University. The SA4 paper is also done in collaboration with Prof. Jie Lei from Xidian University. Congratulations to all!
- Jun 2024, one paper accepted by PacRim 2024 and received the highest review score among all submissions in the Computers track of PacRim 2024. The paper is on "HiTC: High-Performance Triangle Counting on HBM-Equipped FPGAs using HLS". Congrats to Junzhe, Manoj, and Xingyu!
- Jun 2024, Dr. Fang is invited to serve on the DATE 2025 TPC, welcome to submit!
- May 2024, Dr. Fang has chaired a very successful RAW this year in San Francisco! We would like to thank all the committee members, speakers, attendees, and sponsors again!!
- May 2024, one MASc student joins HiAccel lab! Welcome, Haikai!
- Apr 2024, one paper accepted by ICS 2024. This paper is our another effort on Vision Transformer (ViT) acceleration "QUASAR-ViT: Hardware-Oriented Quantization-Aware Architecture Search for Vision Transformers", congrats to Alec and William. This is a work in collaboration with Prof. Yanzhi Wang's and Prof. Xue Lin's group from Northeastern University (lead).
- Apr 2024, congratulations to Philip for winning the BC Graduate Scholarship!
- Apr 2024, congratulations to Philip for winning the NSERC CGS-M Scholarship!
- Mar 2024, the HiAccel lab will host two high school coops from Terry Fox Secondary and McNair Secondary! Welcome, Jasmine and Jared!
- Mar 2024, Dr. Fang visits ByteDance, and gives a talk on "Software-Programmable Accelerator-Centric Systems"!
- Mar 2024, Dr. Fang is invited to serve on the IISWC 2024 organizing committee, welcome to submit!
- Mar 2024, Dr. Fang is invited to serve on the FPL 2024 TPC, welcome to submit!
- Feb 2024, congratulations to Alec for successfully defending his PhD thesis! Alec is the first PhD graduate from the HiAccel lab. Wish him the best in Meta!
- Dec 2023, one paper accepted by ICASSP 2024. The paper is on "Efficient Learned Image Compression with Selective Kernel Residual Module and Channel-wise Causal Context Model". Congrats to Haisheng (co-supervised with Prof. Jie Liang)!
- Dec 2023, one paper accepted by DCC 2024. The paper is on "Learned Image Compression with Dual-Branch Encoder and Conditional Information Coding". Congrats to Haisheng (co-supervised with Prof. Jie Liang)!
- Dec 2023, one paper accepted by FPGA 2024. The paper is on "HiSpMV: Hybrid Row Distribution and Vector Buffering for Imbalanced SpMV Acceleration on FPGAs". It received the highest review score among all FPGA 2024 submissions, tied with two other papers. Congrats to Manoj and Xingyu!
- More News
Dr. Zhenman Fang is a Tenure-Track Assistant Professor in School of Engineering Science (Computer Engineering Option) and an Associate Member in School of Computing Science, Simon Fraser University, Canada. Zhenman founded and directs the HiAccel lab. He is also a member of SFU Systems Group and SFU Institute for Neuroscience and Neurotechnology.
Zhenman's recent research focuses on customizable computing with software-defined hardware acceleration, which aims to sustain the ever-increasing performance, energy-efficiency, and reliability demand of important application domains in post-Moore’s law era. It spans the entire computing stack, including emerging application characterization and acceleration (including machine learning, big data analytics, computational genomics, and high-performance computing), novel accelerator-rich and near-data computing architecture designs, and corresponding programming, runtime, and tool support. Zhenman has published over 60 papers in top conferences and journals and two US patents, including three best paper awards (FPL 2024 Stamatis Vassiliadis Best Paper, TCAD 2019 Donald O. Pederson Best Paper, and MEMSYS 2017 Best Paper), two best paper nominees (HPCA 2017 and ISPASS 2018), a top paper highlighted in the FPGA 2021 Special Issue in ACM TRETS, a top paper received the highest review score among all FPGA 2024 submissions, and an invited paper from Proceedings of the IEEE 2019. His research has also been recognized with a NSERC (Natural Sciences and Engineering Research Council of Canada) Alliance Award (2020), a CFI JELF (Canada Foundation for Innovation John R. Evans Leaders Fund) Award (2019), a Xilinx University Program Award (2019), a Team Award from Xilinx Software and IP Group (2018), and a Postdoc Fellowship from UCLA Institute for Digital Research and Education (2016-2017). Zhenman has also actively served in the organizing and program committee of top-tier conferences in the areas of FPGA and reconfigurable computing, design automation, and computer architecture. Recently, he has served as General Chair of ASAP 2025, Program Chair of RAW 2024 and RAW 2025, and Program Co-Chair of PacRim 2024.
Before joining SFU, Zhenman worked in the Xilinx SDx (now rebranded as AMD/Xilinx Vitis) group at San Jose as a Staff Software Engineer from Sept 2017 to Mar 2019. At Xilinx, he worked on the topic of accelerator-rich architectures and systems, which is the major focus of his postdoc research at UCLA. From Jul 2014 to Sept 2017, Zhenman was a postdoc in Department of Computer Science, UCLA, under the supervision of Prof. Jason Cong and Prof. Glenn Reinman. While at UCLA, he was also a member of the NSF/Intel funded multi-university Center for Domain-Specific Computing (CDSC) and SRC/DARPA funded multi-university Center for Future Architectures Research (C-FAR). Zhenman earned his Ph.D degree in Jun 2014 from School of Computer Science, Fudan University, China, under the supervision of Prof. Binyu Zang. He also spent the last 15 months of his PhD study visiting Department of Computer Science and Engineering, University of Minnesota at Twin Cities, under the supervision of Prof. Pen-Chung Yew.
Zhenman is a Professional Engineer in the province of British Columbia (registered with APEGBC) and a Senior Member of IEEE.
- Organizing: ASAP 2025 General Chair, RAW 2025 Program Chair, PacRim 2024 Program Co-Chair, RAW 2024 Program Chair,
IISWC 2024 Poster Chair, ARC 2024 Publicity Co-Chair, FCCM 2023 Demo Night Co-Chair, FPL 2022 Publicity Chair,
FCCM 2022 Workshop Chair and Travel Awards Chair, DAC-ROAD4NN 2020-2023 Organizing Chair,
ASAP 2021 Special Session Chair
- 2025 TPC: FPGA, DATE, RAW (Program Chair)
- 2024 TPC: FPGA, FCCM, FPL, FPT, DAC, DATE, RAW (Program Chair)
- 2023 TPC: FPGA, FCCM, FPL, FPT, DAC, HPCA, ISCA (ERC), MICRO (Light Load)
- 2022 TPC: FPGA, FCCM, FPL, FPT, DAC, DATE, MICRO, ISCA (ERC)
- 2021 TPC: FPGA, FPT, DAC, DATE, IPDPS, ICCD, ASAP, ISCA (ERC), MICRO (ERC)
- More Services
- Emerging workload characterization and acceleration: especially for machine learning, big data analytics, computational genomics, image and video processing, and high-performance computing
- Computer architecture: especially for heterogeneous and energy-efficient accelerator-rich architectures (ARAs), multicore and many-core architectures, memory systems and near data acceleration
- Programming, automation, and compiler support: especially programming, automation, and compiler support for the above computer architectures
- Big data computing system: especially for enabling FPGA accelerators in datacenter
- Performance evaluation: especially for architectural simulation, benchmarking, prototyping, and GPU-FPGA comparison
- Reliability for hardware accelerators: especially for learning-based hardware reliability modeling and robustness for machine learning accelerators
- Sept 2024
- FPL 2024 Stamatis Vassiliadis Best Paper Award
- Dec 2023
- FPGA 2024 Paper with the Highest Review Score
- May 2023
- Institute of Electrical and Electronics Engineers (IEEE) Senior Member
- Dec 2022
- FPGA 2021 Paper Highlighted in ACM TRETS Special Issue
- Oct 2020
- Natural Sciences and Engineering Research Council of Canada (NSERC) Alliance Award
- Oct 2019
- Xilinx University Program Award
- Sept 2019
- Canada Foundation for Innovation John R. Evans Leaders Fund (CFI JELF) Award
- May 2019
- TCAD 2019 Donald O. Pederson Best Paper Award, IEEE Council on Electronic Design Automation
- Dec 2018
- Team Award in Xilinx Software and IP Group (1000+ people group)
- Jul 2018
- Outstanding Reviewer, Elsevier Journal of Parallel and Distributed Computing (JPDC)
- Apr 2018
- ISPASS 2018 Best Paper Nominee
- Oct 2017
- MEMSYS 2017 Best Paper Award
- Aug 2017
- Outstanding Reviewer, Integration, the Elsevier VLSI Journal
- Aug 2017
- Outstanding Reviewer, Elsevier Microprocessors and Microsystems (MICPRO)
- Feb 2017
- HPCA 2017 Best Paper Nominee
- Dec 2016
- Best Demo Award (3rd Place out of 49 Demos) at C-FAR 2016 Annual Review
- Jun 2016
- Outstanding Reviewer, Elsevier Journal of Parallel and Distributed Computing (JPDC)
- May 2016
- UCLA Institute for Digital Research and Education (IDRE) 2016-2017 Postdoc Fellowship
- Nov 2012
- China National Scholarship for PhD Students, Ministry of Education of China